1. Technical Field
The present disclosure relates to a semiconductor memory device, and more particularly, to an output driver that is capable of a controlling short circuit current.
2. Discussion of the Related Art
With the development of high-performance memory systems, the operating frequencies thereof are increasing. Typically, a variety of memory devices are connected to a memory system bus. For example, when a DRAM is connected to a bus line, the DRAM should satisfy a predetermined requirement corresponding to the operational demands of a memory system. More specifically, the output driver of the DRAM should satisfy a requirement of controlling the current that might be caused by the occurrence of a short circuit.
FIGS. 1A and 1B are a circuit diagram and an operational timing diagram, respectively, of a conventional output driver. Referring to FIG. 1A, an output driver 100 includes a first inverter 102 receiving a first driving signal DOP, a second inverter 104 receiving a second driving signal DON, and a PMOS transistor 106 and an NMOS transistor 108 that are serially connected between a power supply voltage VDDQ and a ground voltage VSSQ. An output of the first inverter 102 is connected to a gate of the PMOS transistor 106. An output of the second inverter 104 is connected to a gate of the NMOS transistor 108.
Referring to FIG. 1B, a logic high pulse section B of the second driving signal DON exists within a logic high pulse section A of the first driving signal DOP. During the period between time T1 and time T2, the PMOS and NMOS transistors 106 and 108 of the output driver 100 are both turned on and, thus, a short circuit current flows from the power supply voltage VDDQ to the ground voltage VSSQ. During the period between time T3 and time T4, the PMOS and NMOS transistors 106 and 108 of the output driver 100 are both turned on again and, thus, the short circuit current flows from the power supply voltage VDDQ to the ground voltage VSSQ.
Short circuit current functions as a factor that impedes the performance of a memory system. Thus, there remains a demand for an output driver that can control the short circuit current.